A Simple Makefile Tutorial

                               A Simple Makefile Tutorial

A Simple Makefile Tutorial: http://www.cs.colby.edu/maxwell/courses/tutorials/maketutor/

Makefiles are a simple way to organize code compilation. This tutorial does not even scratch the surface of what is possible using make, but is intended as a starters guide so that you can quickly and easily create your own makefiles for small to medium-sized projects.
Makefile是一种以简单的方式来组织代码进行编译的文件。本教程并不对make使用深刻研究，而是旨在为初学者指南，让您能够快速，轻松地为小、中等规模的项目建立本身的makefile文件。

A Simple Example
一个简单的示例

Let's start off with the following three files, hellomake.c, hellofunc.c, and hellomake.h, which would represent a typical main program, some functional code in a separate file, and an include file, respectively.
让咱们由如下三个文件开始：hellomake.c、hellofunc.c、hellomake.h，分别是：一个典型的主程序、一个单独的文件包含一些功能程序、一个头文件。
+--------------------------------------+---------------------------------+------------------------------+
| hellomake.c                          |   hellofunc.c                   |   hellomake.h                |
+--------------------------------------+---------------------------------+------------------------------+
| #include <hellomake.h>               | #include <stdio.h>              | /*                           |
|                                      | #include <hellomake.h>          | example include file         |
| int main() {                         | void myPrintHelloMake(void) {   | */                           |
|   // call a function in another file |                                 |                              |
|   myPrintHelloMake();                |   printf("Hello makefiles!\n"); | void myPrintHelloMake(void); |
|                                      |                                 |                              |
|   return(0);                         |   return;                       |                              |
| }                                    | }                               |                              |
+--------------------------------------+---------------------------------+------------------------------+

Normally, you would compile this collection of code by executing the following command:
一般状况下，你会经过执行如下命令来编译全部的代码：

gcc -o hellomake hellomake.c hellofunc.c -I.

This compiles the two .c files and names the executable hellomake. The -I. is included so that gcc will look in the current directory (.) for the include file hellomake.h. Without a makefile, the typical approach to the test/modify/debug cycle is to use the up arrow in a terminal to go back to your last compile command so you don't have to type it each time, especially once you've added a few more .c files to the mix.
编译两个.c文件并输出可执行文件名称为hellomake 。-I 表示gcc会查看在当前目录（.）的头文件hellomake.h 。若是没有makefile文件，在典型的软件编写流程中的测试、修改、调试周期中，使用向上箭头在终端中找到你最后的使用编译命令（最近成功编译的那条命令），尤为是当你组合了比较多的.c文件时，这样你就没必要每次都输入它，反正你确定不肯意每次都输入一串很长的编译命令，并且每次都是一样的编译命令。

Unfortunately, this approach to compilation has two downfalls. First, if you lose the compile command or switch computers you have to retype it from scratch, which is inefficient at best. Second, if you are only making changes to one .c file, recompiling all of them every time is also time-consuming and inefficient. So, it's time to see what we can do with a makefile.
不幸的是，这种方法汇编有两个弱点。首先，若是你丢失、忘记了编译命令或者换了台电脑，你必须从头开始，这充其量是低效率的从新输入。其次，若是你只更改一个.c文件，每次从新编译全部的文件也费时，效率低下。那么，是时候看看，当咱们有了makefile文件以后，咱们能作什么。

The simplest makefile you could create would look something like:
您能够建立的最简单的Makefile应该是这个样子：

Makefile 1

1 hellomake: hellomake.c hellofunc.c
2      gcc -o hellomake hellomake.c hellofunc.c -I.

If you put this rule into a file called Makefile or makefile and then type make on the command line it will execute the compile command as you have written it in the makefile. Note that make with no arguments executes the first rule in the file. Furthermore, by putting the list of files on which the command depends on the first line after the :, make knows that the rule hellomake needs to be executed if any of those files change. Immediately, you have solved problem #1 and can avoid using the up arrow repeatedly, looking for your last compile command. However, the system is still not being efficient in terms of compiling only the latest changes.
若是你把这个规则写到一个名为Makefile的文件或Makefile的文件里，而后输入make命令行会执行您在makefile文件写的编译命令。须要注意的是，不带参数默认执行文件中的第一条规则。此外，将命令依赖的文件列表放在第一行冒号（：）后面，若是任何文件发生改变，make知道hellomake规则须要从新执行。这样，你已经解决了第一个问题，避免反复使用向上箭头，寻找你的最后编译命令。可是，该系统仍没有被有效地知足只编译的最新变化的.c文件这个需求。

One very important thing to note is that there is a tab before the gcc command in the makefile. There must be a tab at the beginning of any command, and make will not be happy if it's not there.
须要注意的一个很是重要的事情是，在makefile gcc的命令前一个tab键。必须在任何命令的开头一个tab键，若是它不存在，make将会很不爽。  :) 

In order to be a bit more efficient, let's try the following:
为了更有效一点，让咱们尝试如下操做：

Makefile 2

1 CC=gcc
2 CFLAGS=-I.
3 
4 hellomake: hellomake.o hellofunc.o
5      $(CC) -o hellomake hellomake.o hellofunc.o -I.

So now we've defined some constants CC and CFLAGS. It turns out these are special constants that communicate to make how we want to compile the files hellomake.c and hellofunc.c. In particular, the macro CC is the C compiler to use, and CFLAGS is the list of flags to pass to the compilation command. By putting the object files--hellomake.o and hellofunc.o--in the dependency list and in the rule, make knows it must first compile the .c versions individually, and then build the executable hellomake.
因此，如今咱们已经定义了一些常量CC和CFLAGS。这些特殊的常量用于告知make，咱们想要如何编译hellomake.c、hellofunc.c。特别是，宏CC是给C编译器使用，而CFLAGS是标志列表，传递给编译器的参数。经过将目标文件hellomake.o、hellofunc.o放在规则的依赖列表中，使make知道它必须首先编译.C单独版本，而后生成可执行的hellomake 。

Using this form of makefile is sufficient for most small scale projects. However, there is one thing missing: dependency on the include files. If you were to make a change to hellomake.h, for example, make would not recompile the .c files, even though they needed to be. In order to fix this, we need to tell make that all .c files depend on certain .h files. We can do this by writing a simple rule and adding it to the makefile.
使用这种形式的makefile足以知足大多数小规模项目。然而，有一件事会发生：依赖发生的改变内容在.h文件中。若是仅仅对hellomake.h进行修改，即便这样须要从新编译.c文件，make也不会从新编译.c文件。为了解决这个问题，咱们须要告诉make，全部.c文件取决于某些.h文件。咱们能够经过编写一个简单的规则，并将其添加到生成文件中作到这一点。

Makefile 3

1 CC=gcc
2 CFLAGS=-I.
3 DEPS = hellomake.h
4 
5 %.o: %.c $(DEPS)
6     $(CC) -c -o $@ $< $(CFLAGS)
7 
8 hellomake: hellomake.o hellofunc.o 
9     gcc -o hellomake hellomake.o hellofunc.o -I.

This addition first creates the macro DEPS, which is the set of .h files on which the .c files depend. Then we define a rule that applies to all files ending in the .o suffix. The rule says that the .o file depends upon the .c version of the file and the .h files included in the DEPS macro. The rule then says that to generate the .o file, make needs to compile the .c file using the compiler defined in the CC macro. The -c flag says to generate the object file, the -o $@ says to put the output of the compilation in the file named on the left side of the :, the $< is the first item in the dependencies list, and the CFLAGS macro is defined as above.
这除了首先建立宏DEPS，而且将.h文件设置成为.c文件的依赖。而后，咱们定义适用于全部.o后缀结尾的文件的规则。规则说，.o文件将取决于文件的.C版本和DEPS宏定义的.h文件。而后，规则说，生成的.o文件，使用CC宏定义的编译器来编译.c文件。-c标志说，生成目标文件，-o $@说把编译输出到冒号（：）左边的文件名中，$ <在依赖列表中的第一项，和CFLAGS宏被定义如前面所述。

As a final simplification, let's use the special macros $@ and $^, which are the left and right sides of the :, respectively, to make the overall compilation rule more general. In the example below, all of the include files should be listed as part of the macro DEPS, and all of the object files should be listed as part of the macro OBJ.
做为最终简化版本，让咱们用特殊的宏$@和$^，他们分别表明冒号（：）左侧和右侧，让使整个编制规则更具备通用性。在下面的例子中，全部的.h文件应该被列为宏DEPS的一部分，而且全部的目标文件的应列为宏OBJ的一部分。

Makefile 4

 1 CC=gcc
 2 CFLAGS=-I.
 3 DEPS = hellomake.h
 4 OBJ = hellomake.o hellofunc.o 
 5 
 6 %.o: %.c $(DEPS)
 7     $(CC) -c -o $@ $< $(CFLAGS)
 8 
 9 hellomake: $(OBJ)
10     gcc -o $@ $^ $(CFLAGS)

So what if we want to start putting our .h files in an include directory, our source code in a src directory, and some local libraries in a lib directory? Also, can we somehow hide those annoying .o files that hang around all over the place? The answer, of course, is yes. The following makefile defines paths to the include and lib directories, and places the object files in an obj subdirectory within the src directory. It also has a macro defined for any libraries you want to include, such as the math library -lm. This makefile should be located in the src directory. Note that it also includes a rule for cleaning up your source and object directories if you type make clean. The .PHONY rule keeps make from doing something with a file named clean.
那么，若是咱们要把咱们的.h文件放在include目录，在src目录下存放源代码，并在lib目录下存放了一些本地库，该怎么办？此外，咱们能够以某种方式隐藏那些烦人的.o文件？固然，答案是确定的。下面的makefile定义include和lib目录路径，并将OBJ做为src目录的子目录，将目标文件存放于OBJ目录。固然也定义了一个宏用于包含你想要的任何库，如数学库-lm。这个makefile应位于src目录。请注意，这还包括一条规则，若是你输入make clean会清理你的源代码和目标目录的规则。.PHONY规则防止make将clean识别为一个文件而不是一条规则。

Makefile 5

 1 IDIR =../include
 2 CC=gcc
 3 CFLAGS=-I$(IDIR)
 4 
 5 ODIR=obj
 6 LDIR =../lib
 7 
 8 LIBS=-lm
 9 
10 _DEPS = hellomake.h
11 # 在$(patsubst %.c，%.o，$(dir) )中，patsubst把$(dir)中的变量符合后缀是.c的所有替换成.o，
12 # 在$(patsubst %,$(IDIR)/%,$(_DEPS))中，patsubst把$(_DEPS)目标前面加入一个路径前缀
13 DEPS = $(patsubst %,$(IDIR)/%,$(_DEPS)) 
14 
15 _OBJ = hellomake.o hellofunc.o 
16 # 同上
17 OBJ = $(patsubst %,$(ODIR)/%,$(_OBJ))
18 
19 
20 $(ODIR)/%.o: %.c $(DEPS)
21     $(CC) -c -o $@ $< $(CFLAGS)
22 
23 hellomake: $(OBJ)
24     gcc -o $@ $^ $(CFLAGS) $(LIBS)
25 
26 .PHONY: clean
27 clean:
28     rm -f $(ODIR)/*.o *~ core $(INCDIR)/*~ 

So now you have a perfectly good makefile that you can modify to manage small and medium-sized software projects. You can add multiple rules to a makefile; you can even create rules that call other rules. For more information on makefiles and the make function, check out the GNU Make Manual, which will tell you more than you ever wanted to know (really).
因此，如今你有一个完美的makefile文件，您能够修改管理小型、中型的软件项目。您能够添加多个规则到makefile文件；你甚至能够建立规则来调用其余规则。有关makefile文件的更多信息，以及功能，请查阅GNU Make使用手册，它会告诉你，比你曾经想知道（真的）的更多 。